Circuit to reduce power supply fluctuations in high frequency/high power circuits

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【作者】 David William Boerstler  Eskinder Hailu  Mack Wayne Riley  Michael Fan Wang 

【摘要】A circuit for transitioning clocking speeds, or frequencies, is provided. With this circuit, a clocking circuit providing a first clock signal at a first clock frequency is coupled to a counter. A comparator and a first divider are coupled to an output of the counter. The first divider outputs a second clock signal at a second clock frequency. A second divider is interposed between the clocking circuit and the counter. A processor is coupled to an output of the first divider.

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